1. Field of the Invention
The present invention relates to a semiconductor device such as a power device or high frequency use switching IC, and in particular, relates to a semiconductor device in which is mounted a power semiconductor element.
2. Related Art
A semiconductor device (power semiconductor module) is used in an inverter device, uninterruptible power supply device, machine tool, industrial robot, and the like, independently of a main body thereof. A semiconductor device (semiconductor module) including at least one semiconductor element (semiconductor chip) joined onto a metal foil formed on an insulating plate, a printed substrate disposed opposing the semiconductor element (semiconductor chip), and a plurality of post electrodes that electrically connect at least one of metal foils formed on first and second main surfaces of the printed substrate and at least one main electrode of the semiconductor element (semiconductor chip), has been proposed as the power semiconductor module. See, for example, Japanese Patent Application Publication No. JP-A-2009-64852 (also referred to herein as “PTL 1”).
This semiconductor device, as shown in FIGS. 12A and 12B, is a type of semiconductor module wherein the main electrodes of the semiconductor chip are electrically connected by a plurality of post electrodes. A semiconductor module 201 has a structure wherein an insulating substrate 202 and an implant printed substrate 203 (hereafter called simply a printed substrate) caused to oppose the insulating substrate 202 are sealed by an under filling material, resin material, or the like, 204, thereby becoming integrated. A plurality of semiconductor chips 205 are mounted on the insulating substrate 202.
Furthermore, the semiconductor module 201 is packaged with a resin case (not shown), and functions as, for example, a general-purpose IGBT module. The insulating substrate 202 includes an insulating plate 206, a metal foil 207 formed on the lower surface of the insulating plate 206 using a DCB (Direct Copper Bonding) method, and a plurality of metal foils 208 formed on the upper surface of the insulating plate 206, also using a DCB method. The semiconductor chips 205 are joined onto the metal foils 208 across a lead free solder layer 209 of a tin (Sn)-silver (Ag) series.
Also, the printed substrate 203 is of a multilayer structure wherein, for example, a resin layer 213 is disposed in a central portion, metal foils 214 are formed by patterning on the upper surface and lower surface of the resin layer 213, and the metal foils 214 are covered by protective layers 215. A plurality of through holes 210 are provided in the printed substrate 203, a thin, tubular plating layer (not shown) that electrically connects the upper surface and lower surface metal foils 214 is provided inside the through holes 210, and cylindrical post electrodes 211 are press fitted (implanted) across the tubular plating. Furthermore, the semiconductor chips 205 are joined to the post electrodes 211 across a solder layer 212. Further, the space between the printed substrate 203 and insulating plate 206 is filled with an under filling, and the under filling is sealed with a sealing member on the upper surface side of the printed substrate 203.
Also, a resin-sealed type power module device wherein, as shown in FIG. 13, a substrate 302 is disposed on a metal plate 301, semiconductor chips 303 are mounted on the substrate 302, the semiconductor chips 303 and external connection terminals 304 are electrically connected by bonding wire 305, a surrounding case 306 is attached to an outer peripheral portion of the metal plate 301, the semiconductor chips 303 are enclosed with silicone gel 307, and the upper surface side of the silicone gel 307 is sealed with an epoxy resin 308, has been proposed as another semiconductor device. See, for example, Japanese Patent Application Publication No. JP-A-8-64759 (also referred to herein as “PTL 2”).
Furthermore, a resin-sealed type semiconductor device wherein an internal lead is electrically connected to an external terminal disposed on an element formation surface of a semiconductor pellet and, when the semiconductor pellet and internal lead are sealed with a resin sealing body, an internal sealing body, with low moisture permeability and a low Young's modulus in comparison with the resin sealing body, is provided between the semiconductor pellet and resin sealing body, has been proposed as another semiconductor device. See, for example, Japanese Patent Application Publication No. JP-A-5-175375 (also referred to herein as “PTL 3”).
Also, a two layer resin-sealed type semiconductor device wherein a semiconductor chip is sealed with an epoxy and silicone elastomer resin composition layer, and furthermore, the periphery thereof is sealed with an epoxy resin composition, has been proposed as another semiconductor device. See, for example, Japanese Patent Application Publication No. JP-A-9-321182 (also referred to herein as “PTL 4”).
Also, an electrical part wherein a semiconductor element is disposed with adhesive on a circuit substrate, the upper surface of the semiconductor element is covered with a silicone hardener, and the silicone hardener is resin sealed with a sealing resin, has been proposed as another semiconductor device. See, for example, Japanese Patent Application Publication No. JP-A-10-79454 (also referred to herein as “PTL 5”).
Furthermore, a flip chip type light emitting semiconductor device wherein a flip chip type light emitting semiconductor device silicone under filling material formed of a hardening silicone composition including 100 parts by mass of a thermal hardening liquid silicone composition and 100 to 400 parts by mass of a spherical non-organic filling material with a particle diameter of 50 μm or less and an average particle diameter of 0.5 to 10 μm, wherein oxide hardness at 25° C. (type A) is 40 or less, the Young's modulus is 2.0 mpa or less, and the linear expansion coefficient is 250 ppm or less, is applied as a silicone under filling material having excellent heat resistance and light resistance, and a high linear expansion coefficient in comparison with that of an epoxy resin, has been proposed as another resin-sealed type semiconductor device. See, for example, Japanese Patent Application Publication No. JP-A-2011-1412 (also referred to herein as “PTL 6”).
Also, a semiconductor device mounting structure wherein a plate-form LSI (electronic part) is mounted on a substrate across a solder bump, an under filling resin (under filling material) filling the space between the LSI and the substrate is larger than the LSI when seen in plan view and disposed in a form similar to that of the LSI, protruding portions protruding from the substrate are provided in an under filling resin filling region in proximity to corner portions of the LSI and corresponding to positions farthest from the center of the LSI, the under filling resin moves to the protruding portions so as to be suctioned up to an upper portion along the surface of the protruding portions by surface tension, and the under filling resin concentrates in the corner portions of the LSI by concentrating on the protruding portions, covering the side surfaces of the LSI and the side surfaces of a low dielectric film disposed on the bottom surface of the LSI, has been proposed as another semiconductor device. See, for example, Japanese Patent Application Publication No. JP-A-2011-49502 (also referred to herein as “PTL 7”).
Herein, in order for the characteristics of a power module in which is mounted a wide bandgap device of SiC (silicon carbide), GaN (gallium nitride), or the like, to be utilized to the full extent, operation at a temperature higher than that of existing power modules is necessary. When the operating temperature range reaches 250° C. or higher, there is a problem with the reliability of epoxy resin used heretofore as a sealing material in that thermal degradation occurs.
Therefore, the securing of reliability at high temperatures is being attempted by adopting a structure wherein the vicinity of a semiconductor element is filled with a sealing material (of a silicone series, a polyimide series, or the like) with still higher heat resistance. However, as these sealing materials are not suited to the formation of a module exterior in terms of mechanical properties and cost, the adoption of a double structure wherein the outer periphery is sealed with an epoxy resin is being carried out, as described in PTL 1 to 6.
When employing a double sealing structure in this way, it is possible to regulate outflow of the under filling material and epoxy resin when having the surrounding case 306, as described in PTL 2. Meanwhile, when not having a surrounding case, it may happen when filling the periphery of a semiconductor element with a sealing material that the sealing material flows into a region other than a predetermined sealing region. As a result of this, when having the insulating substrate 202 and printed substrate 203, as shown in FIG. 12, and furthermore, when the outer periphery of this package is covered with an epoxy resin, the attachment area between the epoxy resin on the outer periphery and the insulating substrate 202 and printed substrate 203 decreases, because of which, when carrying out a temperature cycle test or the like, there is an unresolved problem in that the epoxy resin is liable to become detached from the substrates and the sealing material on the semiconductor periphery, and resin cracking and substrate damage occur.
The semiconductor devices described in PTL 3 to 6, not having an insulating plate or printed substrate, are such that the periphery of a semiconductor element is sealed with a first sealing material, and the exterior of the first sealing material is sealed with a second sealing material. Because of this, there is no need to consider detachment between a substrate disposed on the upper surface side of the semiconductor element and the second sealing material, and the heretofore described unresolved problem does not occur. Also, in the case of the semiconductor device described in PTL 7 too, it is described only that the under filling resin is disposed in a similar form by using protruding portions on the periphery of the LSI, and no consideration is given to covering with an epoxy resin the whole of a structure in which an insulating substrate and printed substrate are disposed.